Define the architecture for an LLM SOC to meet specified performance requirements,Partition design into hardware and software. Lead performance analysis of RTL.
Description:
Experience with SOC architecture definition. Define the architecture for an LLM SOC to meet specified performance requirements. Decide what IP needs to be purchased and what needs to designed internally. Partition design into hardware and software. Lead performance analysis of RTL. Pick the interconnection topology and power management strategy. Architecture modeling as required. Familiarity with Verilog RTL and programming languages. Experience with compute intensive hardware and ability to work with algorithm groups to translate algorithm specifications into hardware. Familiarity with AI algorithms is a plus.