Senior ASIGN Engineer, Signal & Power Integrity - Hardware at Nvidia Corporation

Posted in General Business 26 days ago.

This job brought to you by eQuest

Type: Full-Time
Location: Santa Clara, California





Job Description:


We are now looking for a Senior ASIGN Engineer - Signal & Power Integrity.

NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI - the next era of computing. NVIDIA is a "learning machine" that constantly evolves by adapting to new opportunities that are hard to solve, that only we can tackle, and that matter to the world. This is our life's work, to amplify human creativity and intelligence. Make the choice and join us today!

This is a dynamic team working with state of the art, unique technology. If you are someone that loves a challenge, come join this diverse team and help move the needle!

What you'll be doing:


  • You'll drive the next generation NVLink signal integrity requirements and product definition


  • Work closely with Architecture, ASIC, Mixed Signal, Package, and PCB Design teams to design and ensure link performance meets expectation before tapeout


  • Get along with multiple connector vendors to drive/optimize various type of high-speed connectors


  • Help the team develop novel algorithms & new methodologies to improve SI/PI modeling efforts


  • Work with the Application Engineering teams to support customers with SI/PI questions


  • You will conduct VNA & TDR measurements to support model correlation efforts and improve confidence in design guidance


What we need to see:


  • MS/PhD in EE or BS with a minimum 5 years of experience as a SI/PI engineer


  • Deep understanding of electromagnetics, specifically electromagnetic waves including transmission line theory and via properties


  • You should have expert level proficiency with Ansys EM tools


  • Understanding of high volume manufacturing variations and impact to channel signal integrity


  • Familiarity with high-speed I/O design concepts including clock generation, transmitter & receiver design, and equalization schemes


  • Exposure to lab measurements including VNA & TDR experience , interface timing budgets and system modeling


  • Passionate about SI/PI work


Ways to stand out from the crowd:


  • Be familiar with NRZ/PAM-4/Duobinary signaling schemes

  • PDN analyses including model generation and time domain simulation

  • PSIJ Analyses involving co-simulation of circuits and PDN models

  • Experience with Matlab, Python, and C

  • Exposure to TSV (through-silicon via) modeling and analysis

  • Experience with high-speed cable products

NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression , sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.