Posted in Other 15 days ago.
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Broadcom's Central Engineering Group builds the Foundation IP that powers Broadcom's leading silicon product families.
In this position, the successful candidate will be part of the team responsible for the design, development and delivery of standard cell and custom library foundation IP in the latest advanced FinFet process technology nodes.
Design standard or custom digital logic and sequential cells or macros at the transistor level
Simulate and analyze circuit designs using industry standard simulation tools
Generate and verify library EDA models
Run regression and other quality checks on library deliverables
Interface with design teams to support their requirements
Digital or mixed-signal circuit design knowledge
Understanding of cell layout or physical design
Understanding of verilog, lef, .lib and other industry standard EDA models
Familiarity with EDA tools used for cell design, layout, verification, simulation, timing & power analysis
Experience with Virtuoso, Calibre, Spectre, HSpice, SiliconSmart, Liberate, Primetime, Redhawk or similar tools preferred
Experience with scripting using Unix, Perl, TCL or Python is required
Qualifications & Experience
Bachelor's degree and 12+ years of related experience; or
Master's degree and 10+ years of related experience; or
PhD and 7+ years of related experience
Excellent written and verbal communication skills
Collaborate and work within and across teams
Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, gender identity, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.
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