Sr. Design Verification Engineer at Intuitive in Sunnyvale, California

Job Description:

Company Description

At Intuitive, we are united behind our mission: we believe that minimally invasive care is life-enhancing care. Through ingenuity and intelligent technology, we expand the potential of physicians to heal without constraints.

As a pioneer and market leader in robotic-assisted surgery, we strive to foster an inclusive and diverse team, committed to making a difference. For more than 25 years, we have worked with hospitals and care teams around the world to help solve some of healthcare's hardest challenges and advance what is possible.

Intuitive has been built by the efforts of great people from diverse backgrounds. We believe great ideas can come from anywhere-we strive to foster an inclusive culture built around diversity of thought and mutual respect.We lead with inclusion and empower our team members to do their best work as theirmost authentic selves.

Passionate people who want to make a difference drive our culture-our team members are grounded in integrity, have a strong capacity to learn, the energy to get things done, and bring diverse, real world experiences to help us think in new ways. We actively invest in our team members to support their long-term growth so they can continue to advance our mission and achieve their highest potential.

Join a team committed to taking big leaps forward for a global community of healthcare professionals and their patients. Together,let's advance the world of minimally invasive care.

Job Description

Primary Function of Position:

• Verification of FPGA's on daVinci systems for RTL functional correctness.

Roles & Responsibilities:

• Responsibilities includes starting from testplanning to closing verification using coverage metrics.


• Involves testbench development from scratch or modification to existing testbench infrastructure for verifying new features.


• Work closely with the design team to review specifications and architecture, extract features, define verification plan & coverage model.


• Directed/constrained random test generation, failure analysis and resolution, coverage analysis.


• Debugging failures, bug tracking, and analyze and close coverage.

Qualifications

Skills, Experience, Education, & Training:

• Advanced knowledge of HVL methodology (UVM).


• Expertise in HVL and HDL (SystemVerilog, Verilog).


• Experience defining coverage space and writing coverage model.


• Experience with SystemVerilog Assertion (SVA) is a plus.


• Team player with excellent communication skills and the desire to take on diverse challenges.


• Experience writing scripts in languages such as Perl/Python.


• Solid verification skills in problem solving, constrained random testing, and debugging.


• Experience with Veloce or other HW accelerators and Formal is a plus.

Preferred Job Experience:

• Minimum 5+ years of experience

Additional Information

All your information will be kept confidential according to EEO guidelines.

Due to the nature of our business and the role, please note that Intuitive and/or your customer(s) may require that you show current proof of vaccination against certain diseases including COVID-19. Details can vary by role.

Intuitive is an Equal Employment Opportunity Employer. We provide equal employment opportunities to all qualified applicants and employees, and prohibit discrimination and harassment of any type, without regard to race, sex, pregnancy, sexual orientation, gender identity, national origin, color, age, religion, protected veteran or disability status, genetic information or any other status protected under federal, state, or local applicable laws.

We will consider for employment qualified applicants with arrest and conviction records in accordance with fair chance laws.

Shift : Day

Travel : None

Travel Requirements:None Shift:Day Apply Now